The voltage-controlled oscillator (VCO) is an important building block in phase-locked loops, clock recovery circuits, and frequency synthesizers. High frequency and radio frequency (RF) voltage-controlled oscillators can be implemented monolithically as LC oscillators, as relaxation oscillators and ring oscillators. Ring oscillators are frequently used in the prior art to generate high frequency clock signals. Ring oscillators may be controlled by a voltage or current source to generate a variable frequency signal.
FIG. 1 depicts a block diagram of delay cells arranged as a ring voltage-controlled oscillator of the prior art. Ring oscillator 100 comprises multiple stages of amplification and delay that are connected in tandem, with the last stage coupled back to the first stage in the form of a ring around which the signals propagate. Each stage of the ring oscillator, labeled 100-1 through 100-3 in the figure, provides a phase shift. In particular, each half period the signal will propagate around the delay cell ring with an inversion. Ring oscillators can be implemented using differential pair or current-starved single-ended inverter structures.
FIG. 2 depicts a schematic of a typical differential amplifier with resistive loads to implement a single delay cell. Parasitic capacitances across the drain-to-source of transistors M1 and M2 interact at high frequency with resistors R1 and R2 to provide the requisite phase shift and gain of the delay cell. FIG. 3 is a variation of FIG. 2 in which the resistors have been replaced by MOS transistors M4 and M5. The resistors of FIG. 2 occupy a large area on a die, which can be alleviated in FIG. 3 by transistors, covering a smaller area, the latter operating in their ohmic regions to act as resistive loads. It has been recognized in the prior art that it is beneficial to use differential amplifiers for each of the stages of the ring oscillator in order to cause the oscillator to be more immune to the influence of spurious noises in the form of voltage and current spikes that might be coupled to both sides of the differential circuit. Such a spurious noise from the power supply, for example, would be coupled to both sides of the differential amplifier, and it would therefore affect both of the sides of the differential stages substantially equally. Consequently, the effect of such spurious noise is minimized on the output of the oscillator, which can be taken as the difference of the outputs of any one of the stages.
Two problems associated with using differential amplifiers in a ring oscillators are differential mode lockup and common mode lockup. Differential mode lockup refers to the phenomenon that occurs where each stage (differential amplifier) of the ring oscillator would end up with its output at either the opposite voltage limits or at the same voltage limit as the other stages. However, differential mode lockup typically only occurs in a ring oscillator with an even number of stages (e.g., 2, 4, 6, etc.). For example, in a simple two stage ring oscillator, differential lockup could occur with the first output of stage one and the second output of stage two sitting at one voltage limit while the second output of stage one and the first output of stage two are sitting at the opposite voltage limit. Common mode lockup could occur with the first and second outputs of stage one sitting near one voltage limit while the first and second outputs of stage two are sitting near the opposite voltage limit.
Differential mode lockup can be prevented in a ring oscillator using an even number of stages by crossing the connections made between the outputs and the inputs for one pair (or an odd number of pairs) of connections in the ring oscillator. As a result, an additional phase inversion is provided in the differential signal path, and lockup of the oscillator on a differential basis is prevented. Alternatively, FIG. 4 depicts the resistive loads replaced by monolithic inductors. The inductors, along with the parasitic capacitors of the transistors M1 and M2, form an LC oscillator, which is free of the latch up problems of the resistive load delay cell. This configuration suffers from being dependent on large physical inductors that are hard to match and, together with the parasitic capacitance, hard to tune the oscillation frequency.
The oscillation frequency of LC topologies is equal to
      f    osc    =      1          2      ⁢      π      ⁢              LC            suggesting that only the inductor and capacitor values can be varied to tune the frequency. Since it is difficult to vary the values of the monolithic inductors and the parasitic capacitances, we can replace the parasitic capacitance with a voltage dependent capacitor called a “varactor.” FIG. 5 shows diodes D1 and D2 as reversed biased PN junctions acting as varactors added as shown to the circuit of FIG. 4. VC sets the voltage across diodes D1 and D2, producing a tuning range for the capacitance values which in turn tunes the LC oscillator.
Besides the above-mentioned limitation of monolithic inductor implementations, the PN junction-type varactor has a very limited range of reverse bias voltage, yielding a limited range of tuning frequency.